Conventional memory systems (e.g., storage systems, disk drives, hard disks, memory chips, memory devices, and the like) are fabricated using technologies such as static random access memory (SRAM), dynamic random access memory (DRAM), or non-volatile implementations (e.g., Flash). However, conventional memory systems are problematic because of the need to increase functionality while reducing die sizes.
Memory controllers, logic circuitry, or other components in conventional implementations often require large die sizes in order to accommodate various components or circuits. Conventional implementations often use components such as multiple processors, buffer memory, error correction code (ECC), and direct memory access (DMA) circuits for fast movement of data. Demands for increasingly complex, faster, and larger memory arrays require chips with greater functionality, but smaller die sizes. However, conventional implementations use large circuit patterns that require large die sizes. Due to conventional circuit patterns and component design, power requirements and heat generation are high, which lead to memory system failures and errors. Another issue with conventional implementations is the amount of driving voltage required to program and erase memory cells or elements (“elements”) in conventional memory arrays.
In conventional implementations, driving voltages are generated by circuits known as charge pumps. Charge pumps may be used to receive an input voltage, transfer power using one or more capacitors, and generate an output or driving voltage that is larger or smaller than the input voltage. An output voltage is stabilized and “driven” to a desired voltage level in order to cause a program operation (e.g., read, write, and erase) to occur in elements of a memory array. The voltages generated by conventional charge pumps are limited by factors such as the amount of available current, the size of capacitors used in a charge pump circuit, and the quantity of charge pumps used to generate voltages for the programmable sequences. In conventional memory systems, charge pumps are often implemented using circuitry that can generate large output voltages, thus requiring more or larger capacitors, which are used to store and transfer voltages required to perform a programmable sequence (e.g., read, write, erase). Capacitors in conventional charge pump circuits are designed to support large voltages or stepped up voltages, which requires large die sizes. Further, as conventional memory arrays increase in capacity, the size of conventional charge pumps and the required amount of driving voltages also increase. Combined with conventional charge pumps, conventional memory systems are difficult and expensive to manufacture and operate.
FIG. 1 illustrates a conventional memory system. In conventional implementations, system 100 includes charge pump 102, switches 104-112, and memory blocks 114-120. Here, a functional perspective is shown and in conventional implementations, components 102-120 are formed on the surface of a substrate. Charge pump 102 is a conventional circuit implementation used to step up a voltage which is passed through one of switches 104-112 in order to select an element (not shown) in one of memory blocks 114-120. Voltages from charge pump 102 are large and used for programmable sequences in memory blocks 114-120. However, large voltages generated by charge pump 102 can create disturbances or “disturb effects” in surrounding elements other than those desired. A disturb effect results from the generation of a large voltage by charge pump 102, which changes the resistive state or inadvertently programs or erases a non-selected element. Conventional memory systems suffer from large charge pump sizes and outputs, which require large die sizes, create error and disturb effects, and increase fabrication and operational expenses.
Continuing efforts are being made to improve memory systems.
It is to be understood that the depictions in the FIGs are not necessarily to scale. Although various examples of the invention are disclosed in the accompanying drawings, the invention is not limited to those specific examples.